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Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
Pin Description (continued)
PIN
26, 27
28
NAME
I-, I+
VCC_RF
FUNCTION
Differential I-Channel Baseband Inputs to the Modulator. These pins connect directly to the bases of a
differential pair and require an external common-mode bias voltage of 1.6V.
Supply Voltage Input for RF Circuits. Bypass as close to pin as possible. The bypass capacitor should
not share ground vias with other branches.
—
Exposed pad Ground
Detailed Description
Internally, the MAX2150 includes a broadband I/Q
modulator, internally matched broadband output driver
amplifier, fine-resolution fractional-N frequency synthe-
sizer, an LO buffer amplifier, and an on-chip low-noise
crystal oscillator circuit.
A simple 3-wire interface is provided for synthesizer
programming and device configuration and control.
Independent hardware and software power-down con-
trol of the I/Q modulator, frequency synthesizer, and LO
buffer amplifier is provided, as well as the ability to shut
down the entire chip.
I/Q Modulator
The MAX2150 modulator is composed of a pair of
matched double-balanced mixers, a broadband pas-
sive LO quadrature generator, and a summing amplifi-
er. The mixers accept differential I/Q baseband signals
that directly modulate the internal 0 ° and 90 ° LO sig-
nals applied to the I/Q mixers. An external LO source
drives an internal LO quadrature generator that shifts
the phase of the LO signal applied to the Q mixer by
90 ° relative to the LO signal applied to the I-channel
mixer. The modulated output of the I/Q mixers is
summed together, and the undesired sideband is sup-
pressed.
The I+, I-, Q+, and Q- input ports feature high-linearity
buffer amplifiers with a typical -3dB bandwidth of
75MHz and accept differential input voltages up to
1V P-P . The ports require external biasing and have an
input common-mode requirement of 1.6V. For single-
ended operation, bypass the I and Q ports to ground.
See the Typical Application Circuit for recommended
component values.
The broadband output driver amplifier is matched on
chip across the entire operating frequency range and
The modulator can be shut down with both hardware
(pin 1) and software (TE bit). This mode is useful for
quiet synthesizer programming or to mute the RF out-
put signal. The hardware pin and software bits must be
set to logic-1 to enable the modulator. If the hardware
pin or software bit is set to logic-0, or if both are set to
logic-0, the modulator is disabled.
LO Buffer Amplifier
The broadband buffer amplifier output is internally
matched and requires a DC-blocking capacitor to iso-
late on-chip bias voltages. Power-down of the LO buffer
can be controlled by both BUFEN (pin 23), as well as
BUFEN by software by setting the BUFEN (BE) bit
through the 3-wire interface. The hardware pin and the
software bit must be a logic-1 to enable the buffer. If
the hardware or software bit is set to logic-0, the LO
buffer is disabled.
Frequency Synthesizer
The MAX2150 features an internal 28-bit sigma-delta
frequency synthesizer. This architecture enables the
use of very high (30MHz) comparison frequencies,
which significantly reduces the in-loop phase noise as
a result of reduced division ratios. The high comparison
frequency also allows significantly increased PLL
bandwidths for very fast switching speed applications.
Divider Programming
The MAX2150 frequency programming is determined
as follows. The overall division ratio (D) has an integer
value (N), as well as a fractional component (F):
D = N.F = N +F / 2 28
The N and F values are encoded as straight binary
numbers. Determination of these values is illustrated by
the following example:
F LO = 1721.125MHz, F COMP = 20MHz
requires an output DC-blocking capacitor. For optimum
performance, the output match can be improved with
simple L-section and/or PI-section matching networks.
Then:
D = 1721.125 / 20 = 86.05625
Always ensure that DC blocking is provided, because
internal bias voltages are present at this output.
Therefore:
N = 86 and F = 0.05625 x 2 28 = 15,099,494
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